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E015.D.011-FXLS90230/Drivers/SYSTEM/sys.c

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2025-04-24 11:37:10 +08:00
#include "sys.h"
/**
* @brief <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƫ<EFBFBD>Ƶ<EFBFBD>ַ
* @param baseaddr: <EFBFBD><EFBFBD>ַ
* @param offset: ƫ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @retval <EFBFBD><EFBFBD>
*/
void sys_nvic_set_vector_table(uint32_t baseaddr, uint32_t offset)
{
/* <20><><EFBFBD><EFBFBD>NVIC<49><43><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƫ<EFBFBD>ƼĴ<C6BC><C4B4><EFBFBD>,VTOR<4F><52>9λ<39><CEBB><EFBFBD><EFBFBD>,<2C><>[8:0]<5D><><EFBFBD><EFBFBD> */
SCB->VTOR = baseaddr | (offset & (uint32_t)0xFFFFFE00);
}
/**
* @brief ִ<EFBFBD><EFBFBD>: WFIָ<EFBFBD><EFBFBD>(ִ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>͹<EFBFBD><EFBFBD><EFBFBD>״̬, <EFBFBD>ȴ<EFBFBD><EFBFBD>жϻ<EFBFBD><EFBFBD><EFBFBD>)
* @param <EFBFBD><EFBFBD>
* @retval <EFBFBD><EFBFBD>
*/
void sys_wfi_set(void)
{
__ASM volatile("wfi");
}
/**
* @brief <EFBFBD>ر<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>(<EFBFBD><EFBFBD><EFBFBD>Dz<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>fault<EFBFBD><EFBFBD>NMI<EFBFBD>ж<EFBFBD>)
* @param <EFBFBD><EFBFBD>
* @retval <EFBFBD><EFBFBD>
*/
void sys_intx_disable(void)
{
__ASM volatile("cpsid i");
}
/**
* @brief <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
* @param <EFBFBD><EFBFBD>
* @retval <EFBFBD><EFBFBD>
*/
void sys_intx_enable(void)
{
__ASM volatile("cpsie i");
}
/**
* @brief <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ջ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
* @note <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֺ<EFBFBD>X, <EFBFBD><EFBFBD><EFBFBD><EFBFBD>MDK<EFBFBD><EFBFBD><EFBFBD><EFBFBD>, ʵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>û<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param addr: ջ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
* @retval <EFBFBD><EFBFBD>
*/
void sys_msr_msp(uint32_t addr)
{
__set_MSP(addr); /* <20><><EFBFBD><EFBFBD>ջ<EFBFBD><D5BB><EFBFBD><EFBFBD>ַ */
}
/**
* @brief <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ
* @param <EFBFBD><EFBFBD>
* @retval <EFBFBD><EFBFBD>
*/
//void sys_standby(void)
//{
// __HAL_RCC_PWR_CLK_ENABLE(); /* ʹ<>ܵ<EFBFBD>Դʱ<D4B4><CAB1> */
// SET_BIT(PWR->CR, PWR_CR_PDDS); /* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ */
//}
/**
* @brief ϵͳ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ
* @param <EFBFBD><EFBFBD>
* @retval <EFBFBD><EFBFBD>
*/
void sys_soft_reset(void)
{
NVIC_SystemReset();
}
#ifdef USE_FULL_ASSERT
/**
* @brief <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʾ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD><EFBFBD>˺<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param file<EFBFBD><EFBFBD>ָ<EFBFBD><EFBFBD>Դ<EFBFBD>ļ<EFBFBD>
* line<EFBFBD><EFBFBD>ָ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><EFBFBD>е<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @retval <EFBFBD><EFBFBD>
*/
void assert_failed(uint8_t* file, uint32_t line)
{
while (1)
{
}
}
#endif
//#define IN_SYS
//#include "sys.h"
//#include "usart.h"
//#include "stdio.h"
///**
// * @brief ʱ<><CAB1>ϵͳ<CFB5><CDB3><EFBFBD>ú<EFBFBD><C3BA><EFBFBD>
// *
// * @remark SYSCLK = HSE / PLLM * PLLN / PLLR
// * //SYSCLK = 8M / 1 * 20 /2 = 80M
// * APB 2 <20><><EFBFBD>١<EFBFBD>APB1 <20><><EFBFBD>١<EFBFBD><D9A1><EFBFBD><EFBFBD>ǿɷ<C7BF>Ƶ<EFBFBD>ģ<EFBFBD><C4A3><EFBFBD><EFBFBD>ݷ<EFBFBD>Ƶϵ<C6B5><CFB5><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD>Ƶ<EFBFBD><C6B5>
// * <20><><EFBFBD>ⲿʱ<E2B2BF><CAB1>Ϊ8M<38><4D><EFBFBD>㹫ʽ<E3B9AB><CABD>PLLR=8*N/(M*R)
// * @param void
// *
// * @return void
// */
uint8_t SystemClock_Config(void)
{
HAL_StatusTypeDef ret = HAL_OK;
RCC_OscInitTypeDef RCC_OscInitStruct={0};
RCC_ClkInitTypeDef RCC_ClkInitStruct={0};
__HAL_RCC_PWR_CLK_ENABLE(); //ʹ<><CAB9>PWRʱ<52><CAB1>
//Initializes the CPU, AHB and APB busses clocks
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
RCC_OscInitStruct.HSEState = RCC_HSE_ON; //<2F><><EFBFBD><EFBFBD>HSE
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; //<2F><><EFBFBD><EFBFBD>PLL
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; //PLLʱ<4C><CAB1>Դѡ<D4B4><D1A1>HSE
RCC_OscInitStruct.PLL.PLLM = 1; //
RCC_OscInitStruct.PLL.PLLN = 20; //
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV7; //
RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2; //80MHz
RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2; //
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) //<2F><>ʼ<EFBFBD><CABC>RCC
{
return 1;
//Error_Handler(1);
}
//Initializes the CPU, AHB and APB busses clocks
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; //AHB <20><>Ƶϵ<C6B5><CFB5>Ϊ1
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; //APB1 <20><>Ƶϵ<C6B5><CFB5>Ϊ4
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; //APB2 <20><>Ƶϵ<C6B5><CFB5>Ϊ1
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
{
return 1;
//Error_Handler(1);
}
// Configure the main internal regulator output voltage
if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK)
{
return 1;
//Error_Handler(1);
}
return 0;
}
//void SystemClock_Config(void)
//{
// HAL_StatusTypeDef ret = HAL_OK;
// RCC_OscInitTypeDef RCC_OscInitStruct = {0};
// RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
// /** Initializes the RCC Oscillators according to the specified parameters
// * in the RCC_OscInitTypeDef structure.
// */
// RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
// RCC_OscInitStruct.HSEState = RCC_HSE_ON;
// RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
// RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
// RCC_OscInitStruct.PLL.PLLM = 1;
// RCC_OscInitStruct.PLL.PLLN = 20;
// RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV7;
// RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
// RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
// if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
// {
// Error_Handler(1);
// }
// /** Initializes the CPU, AHB and APB buses clocks
// */
// RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
// |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
// RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
// RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
// RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
// RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
// if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
// {
// Error_Handler(1);
// }
//
// ret = HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4);
// if(ret != HAL_OK) while(1);
// /*Configure the main internal regulator output voltage*/
// ret = HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
// if(ret != HAL_OK) while(1);
// //HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_SYSCLK, RCC_MCODIV_4);
//}
///*
//void SystemClock_Config(void)
//{
// RCC_OscInitTypeDef RCC_OscInitStruct = {0};
// RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
// // Configure the main internal regulator output voltage
// if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK)
// {
// Error_Handler(1);
// //printf("%s:This fake errorr on %d line \r\n", __FUNCTION__,__LINE__);
// }
// // Initializes the RCC Oscillators according to the specified parametersin the RCC_OscInitTypeDef structure.
// RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
// RCC_OscInitStruct.HSIState = RCC_HSI_ON;
// RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
// RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
// RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
// RCC_OscInitStruct.PLL.PLLM = 1;
// RCC_OscInitStruct.PLL.PLLN = 10;
// RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV7;
// RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
// RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
// if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
// {
// Error_Handler(1);
// }
// // Initializes the CPU, AHB and APB buses clocks
// RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
// |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
// RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
// RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
// RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;//RCC_HCLK_DIV2;//RCC_HCLK_DIV4;
// RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
// if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
// {
// Error_Handler(1);
// }
// // HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_SYSCLK, RCC_MCODIV_4);
//}
//*/
///**
// * @brief THUMBָ<42>֧<EEB2BB>ֻ<EFBFBD><D6BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
// * <09><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·<EFBFBD><C2B7><EFBFBD>ʵ<EFBFBD><CAB5>ִ<EFBFBD>л<EFBFBD><D0BB><EFBFBD>ָ<EFBFBD><D6B8>WFI
// *
// * @param void
// *
// * @return __asm
// */
//__asm void WFI_SET(void)
//{
// WFI;
//}
///**
// * @brief <09>ر<EFBFBD><D8B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>(<28><><EFBFBD>Dz<EFBFBD><C7B2><EFBFBD><EFBFBD><EFBFBD>fault<6C><74>NMI<4D>ж<EFBFBD>)
// *
// * @param void
// *
// * @return __asm
// */
//__asm void INTX_DISABLE(void)
//{
// CPSID I
// BX LR
//}
///**
// * @brief <09><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
// *
// * @param void
// *
// * @return __asm
// */
//__asm void INTX_ENABLE(void)
//{
// CPSIE I
// BX LR
//}
///**
// * @brief <09><><EFBFBD><EFBFBD>ջ<EFBFBD><D5BB><EFBFBD><EFBFBD>ַ
// *
// * @param addr ջ<><D5BB><EFBFBD><EFBFBD>ַ
// *
// * @return __asm
// */
//__asm void MSR_MSP(u32 addr)
//{
// MSR MSP, r0 //set Main Stack value
// BX r14
//}
///*
//__weak void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
//{
// uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements,
// ulSysTickCTRL;
// TickType_t xModifiableIdleTime;
//
// //ȷ<><C8B7><EFBFBD>δ<EFBFBD><CEB4><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD> Reload(<28><>װ<EFBFBD><D7B0>)ֵ<><D6B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҳ<EFBFBD><D2B2><EFBFBD>Dz<EFBFBD><C7B2>ܳ<EFBFBD><DCB3><EFBFBD><EFBFBD>δ<EFBFBD><CEB4><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ<EFBFBD><D6B5>
//
//<2F><>(1) <20><><EFBFBD><EFBFBD> xExpectedIdleTime <20><>ʾ<EFBFBD><CABE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD>ڵ͹<DAB5><CDB9><EFBFBD>ģʽ<C4A3><CABD><EFBFBD>е<EFBFBD>ʱ<EFBFBD><CAB1>(<28><>λΪʱ<CEAA>ӽ<EFBFBD><D3BD><EFBFBD><EFBFBD><EFBFBD>)<29><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>ʹ<EFBFBD>õδ<C3B5><CEB4><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>ǵδ<C7B5><CEB4><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD> 24 λ<>ģ<EFBFBD><C4A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>ֵ<EFBFBD><D6B5><EFBFBD>ܳ<EFBFBD><DCB3><EFBFBD><EFBFBD>δ<EFBFBD><CEB4><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ<EFBFBD><D6B5>xMaximumPossibleSuppressedTicks <20>Ǹ<EFBFBD><C7B8><EFBFBD>̬ȫ<CCAC>ֱ<EFBFBD><D6B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD> port.c <20><><EFBFBD>ж<EFBFBD><D0B6>壬<EFBFBD>˺<EFBFBD><CBBA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ں<EFBFBD><DABA><EFBFBD> vPortSetupTimerInterrupt() <20>б<EFBFBD><D0B1><EFBFBD><EFBFBD>¸<EFBFBD>ֵ<EFBFBD><D6B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>£<EFBFBD>
// if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
//ulTimerCountsForOneTick=(configSYSTICK_CLOCK_HZ/configTICK_RATE_HZ)<29><>
//xMaximumPossibleSuppressedTicks=portMAX_24_BIT_NUMBER/ulTimerCountsForOneTick<63><6B>
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> xMaximumPossibleSuppressedTicks=0xffffff/(168000000/1000)=99<39><39><EFBFBD><EFBFBD><EFBFBD>˽<EFBFBD><CBBD><EFBFBD><EFBFBD>͹<EFBFBD><CDB9><EFBFBD>ģʽ<C4A3><CABD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>99<39><39>ʱ<EFBFBD>ӽ<EFBFBD><D3BD>ġ<EFBFBD>
// {
// xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
// }
//
// //ֹͣ<CDA3>δ<EFBFBD><CEB4><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
// portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
//
// //<2F><><EFBFBD>ݲ<EFBFBD><DDB2><EFBFBD> xExpectedIdleTime <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>δ<EFBFBD><CEB4><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>װ<EFBFBD><D7B0>ֵ<EFBFBD><D6B5>
// ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + (2) <20><><EFBFBD>ݲ<EFBFBD><DDB2><EFBFBD> xExpectedIdleTime <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>δ<EFBFBD><CEB4><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>װ<EFBFBD><D7B0>ֵ<EFBFBD><D6B5><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>͹<EFBFBD><CDB9><EFBFBD>ģʽ<C4A3>Ժ<EFBFBD><D4BA>ļ<EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD>ɵδ<C9B5><CEB4><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɵġ<C9B5>
// ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
// if( ulReloadValue > ulStoppedTimerCompensation ) (3) <20>ӵδ<D3B5><CEB4><EFBFBD>ʱ<EFBFBD><CAB1>ֹͣ<CDA3><D6B9><EFBFBD>е<EFBFBD><D0B5><EFBFBD>ͳ<EFBFBD>Ƶõ<C6B5><C3B5>ĵ͹<C4B5><CDB9><EFBFBD>ģʽ<C4A3><CABD><EFBFBD>е<EFBFBD><D0B5><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD>䲹<EFBFBD><E4B2B9><EFBFBD><EFBFBD> FreeRTOS ϵͳʱ<CDB3><CAB1>Ҳ<EFBFBD><D2B2><EFBFBD><EFBFBD>Ҫʱ<D2AA><CAB1><EFBFBD>ģ<EFBFBD><C4A3><EFBFBD><EFBFBD>ڼ<EFBFBD>Ҳ<EFBFBD><D2B2><EFBFBD>г<EFBFBD><D0B3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>еġ<D0B5><C4A1><EFBFBD><EFBFBD>γ<EFBFBD><CEB3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>е<EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>û<EFBFBD><C3BB>ȥͳ<C8A5>ơ<EFBFBD><C6A1><EFBFBD><EFBFBD><EFBFBD>ֻ<EFBFBD>ܴ<EFBFBD><DCB4>ŵ<EFBFBD><C5B5><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB>ʱ<EFBFBD><CAB1>ֵ<EFBFBD><D6B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>ֵ<EFBFBD>ɱ<EFBFBD><C9B1><EFBFBD> ulStoppedTimerCompensation <20><>ȷ<EFBFBD><C8B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB>ȫ<EFBFBD>ֱ<EFBFBD><D6B1><EFBFBD><EFBFBD><EFBFBD>
//#define portMISSED_COUNTS_FACTOR(45UL)
//
//ulStoppedTimerCompensation=portMISSED_COUNTS_FACTOR/(configCPU_CLOCK_HZ/configSYSTICK_CLOCK_HZ)
//ͨ<><CDA8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĺ<EFBFBD>ʽ<EFBFBD><CABD><EFBFBD>Եó<D4B5><C3B3><EFBFBD>ulStoppedTimerCompensation=45/(168000000/168000000)=45<34><35>
// {
// ulReloadValue -= ulStoppedTimerCompensation;
// }
//
// __disable_irq(); (4) <20><>ִ<EFBFBD><D6B4>WFI ǰ<><C7B0><EFBFBD>üĴ<C3BC><C4B4><EFBFBD> PRIMASK <20>Ļ<EFBFBD><C4BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>жϻ<D0B6><CFBB>ѵ<EFBFBD><D1B5>Dz<EFBFBD><C7B2>ᴦ<EFBFBD><E1B4A6><EFBFBD><EFBFBD>Щ<EFBFBD>жϣ<D0B6><CFA3>˳<EFBFBD><CBB3>͹<EFBFBD><CDB9><EFBFBD>ģʽ<C4A3>Ժ<EFBFBD>ͨ<EFBFBD><CDA8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> PRIMASK <20><>ʹ ISR <20>õ<EFBFBD>ִ<EFBFBD>У<EFBFBD><D0A3><EFBFBD>ʵ<EFBFBD><CAB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> PRIMASK <20><><EFBFBD>ӳ<EFBFBD> ISR <20><>ִ<EFBFBD>С<EFBFBD><D0A1><EFBFBD><EFBFBD><EFBFBD> __disable_irq(); <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>üĴ<C3BC><C4B4><EFBFBD> PRIMASK<53><4B><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> PRIMASK ʹ<>ú<EFBFBD><C3BA><EFBFBD> __enable_irq();
// __dsb( portSY_FULL_READ_WRITE );
// __isb( portSY_FULL_READ_WRITE );
//
// //ȷ<><C8B7><EFBFBD>Ƿ<EFBFBD><C7B7><EFBFBD><EFBFBD>Խ<EFBFBD><D4BD><EFBFBD><EFBFBD>͹<EFBFBD><CDB9><EFBFBD>ģʽ
// if( eTaskConfirmSleepModeStatus() == eAbortSleep ) (5) <20><><EFBFBD>ú<EFBFBD><C3BA><EFBFBD> eTaskConfirmSleepModeStatus() <20><><EFBFBD>ж<EFBFBD><D0B6>Ƿ<EFBFBD><C7B7><EFBFBD><EFBFBD>Խ<EFBFBD><D4BD><EFBFBD><EFBFBD>͹<EFBFBD><CDB9><EFBFBD>ģʽ<C4A3><CABD><EFBFBD>˺<EFBFBD><CBBA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD> tasks.c <20><><EFBFBD>ж<EFBFBD><D0B6>塣<EFBFBD>˺<EFBFBD><CBBA><EFBFBD>ͨ<EFBFBD><CDA8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƿ<EFBFBD><C7B7><EFBFBD><EFBFBD>о<EFBFBD><D0BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ܲ<EFBFBD><DCB2>ܽ<EFBFBD><DCBD><EFBFBD><EFBFBD>͹<EFBFBD><CDB9><EFBFBD>ģʽ<C4A3><CABD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> eAbortSleep <20>Ļ<EFBFBD><C4BB>ͱ<EFBFBD>ʾ<EFBFBD><CABE><EFBFBD>ܽ<EFBFBD><DCBD><EFBFBD><EFBFBD>͹<EFBFBD><CDB9><EFBFBD>ģʽ<C4A3><CABD><EFBFBD><EFBFBD>Ȼ<EFBFBD><C8BB><EFBFBD>ܽ<EFBFBD><DCBD><EFBFBD><EFBFBD>͹<EFBFBD><CDB9><EFBFBD>ģʽ<C4A3><CABD>ô<EFBFBD><C3B4><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD>»ָ<C2BB><D6B8>δ<EFBFBD><CEB4><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>С<EFBFBD>
// {
// //<2F><><EFBFBD>ܽ<EFBFBD><DCBD><EFBFBD><EFBFBD>͹<EFBFBD><CDB9><EFBFBD>ģʽ<C4A3><CABD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>δ<EFBFBD><CEB4><EFBFBD>ʱ<EFBFBD><CAB1>
// portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
// portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
// portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
// __enable_irq(); (6) <20><><EFBFBD>ú<EFBFBD><C3BA><EFBFBD>__enable_irq();<3B><><EFBFBD>´<EFBFBD><C2B4><EFBFBD><EFBFBD>ж<EFBFBD>
// }
// else (7) <20><><EFBFBD>Խ<EFBFBD><D4BD><EFBFBD><EFBFBD>͹<EFBFBD><CDB9><EFBFBD>ģʽ<C4A3><CABD><EFBFBD><EFBFBD><EFBFBD>ɵ͹<C9B5><CDB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
// {
// //<2F><><EFBFBD>Խ<EFBFBD><D4BD><EFBFBD><EFBFBD>͹<EFBFBD><CDB9><EFBFBD>ģʽ<C4A3><CABD><EFBFBD><EFBFBD><EFBFBD>õδ<C3B5><CEB4><EFBFBD>ʱ<EFBFBD><CAB1>
// portNVIC_SYSTICK_LOAD_REG = ulReloadValue; (8) <20><><EFBFBD><EFBFBD><EFBFBD>͹<EFBFBD><CDB9><EFBFBD>ģʽ<C4A3><CABD>ʱ<EFBFBD><CAB1><EFBFBD>Ѿ<EFBFBD><D1BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ˣ<EFBFBD><CBA3><EFBFBD><EFBFBD>ｫ<EFBFBD><EFBDAB><EFBFBD><EFBFBD>ֵд<D6B5>뵽<EFBFBD>δ<EFBFBD><CEB4><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>װ<EFBFBD>ؼĴ<D8BC><C4B4><EFBFBD><EFBFBD><EFBFBD>
// portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
// portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
//
// xModifiableIdleTime = xExpectedIdleTime;
// configPRE_SLEEP_PROCESSING( xModifiableIdleTime ); (9) configPRE_SLEEP_PROCESSING <20>Ǹ<EFBFBD><C7B8>꣬<EFBFBD>ڽ<EFBFBD><DABD><EFBFBD><EFBFBD>͹<EFBFBD><CDB9><EFBFBD>ģʽ֮ǰ<D6AE><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һЩ<D2BB><D0A9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>罵<EFBFBD><E7BDB5>ϵͳʱ<CDB3>ӡ<EFBFBD><D3A1>ر<EFBFBD><D8B1><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD>ӡ<EFBFBD><D3A1>رհ<D8B1><D5B0><EFBFBD>ijЩӲ<D0A9><D3B2><EFBFBD>ĵ<EFBFBD>Դ<EFBFBD>ȵȣ<C8B5><C8A3><EFBFBD>Щ<EFBFBD><D0A9><EFBFBD><EFBFBD><EFBFBD>Ϳ<EFBFBD><CDBF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɡ<EFBFBD>
// if( xModifiableIdleTime > 0 )
// {
// __dsb( portSY_FULL_READ_WRITE );
// __wfi(); (10) ʹ<><CAB9> WFI ָ<><D6B8>ʹ STM32F407 <20><><EFBFBD><EFBFBD>˯<EFBFBD><CBAF>ģʽ<C4A3><CABD>
// __isb( portSY_FULL_READ_WRITE );
// }
//
// //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ִ<EFBFBD>е<EFBFBD><D0B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>˵<EFBFBD><CBB5><EFBFBD>Ѿ<EFBFBD><D1BE>˳<EFBFBD><CBB3>˵͹<CBB5><CDB9><EFBFBD>ģʽ<C4A3><CABD>
// configPOST_SLEEP_PROCESSING( xExpectedIdleTime ); (11) <20><><EFBFBD><EFBFBD>ִ<EFBFBD>е<EFBFBD><D0B5><EFBFBD><EFBFBD><EFBFBD>˵<EFBFBD><CBB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ѿ<EFBFBD><D1BE>˳<EFBFBD><CBB3>˵͹<CBB5><CDB9><EFBFBD>ģʽ<C4A3><CABD><EFBFBD>˳<EFBFBD><CBB3>͹<EFBFBD><CDB9><EFBFBD>ģʽ<C4A3>Ժ<EFBFBD>Ҳ<EFBFBD><D2B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>һЩ<D2BB><D0A9><EFBFBD>顣<EFBFBD><E9A1A3><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD>ϵͳʱ<CDB3>ӣ<EFBFBD>ʹ<EFBFBD><CAB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD>ӣ<EFBFBD><D3A3>򿪰<EFBFBD><F2BFAAB0><EFBFBD>ijЩӲ<D0A9><D3B2><EFBFBD>ĵ<EFBFBD>Դ<EFBFBD>ȵȣ<C8B5><C8A3><EFBFBD>Щ<EFBFBD><D0A9><EFBFBD><EFBFBD><EFBFBD>ں<EFBFBD> configPOST_SLEEP_PROCESSING() <20><><EFBFBD><EFBFBD><EFBFBD>ɡ<EFBFBD>
//
//
// //ֹͣ<CDA3>δ<EFBFBD><CEB4><EFBFBD>ʱ<EFBFBD><CAB1>
// ulSysTickCTRL = portNVIC_SYSTICK_CTRL_REG; (12) <20><>ȡ<EFBFBD>δ<EFBFBD><CEB4><EFBFBD>ʱ<EFBFBD><CAB1> CTRL(<28><><EFBFBD>ƺ<EFBFBD>״̬)<29>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>
// portNVIC_SYSTICK_CTRL_REG = ( ulSysTickCTRL &
// ~portNVIC_SYSTICK_ENABLE_BIT );
// __enable_irq(); (13) <20><><EFBFBD>ú<EFBFBD><C3BA><EFBFBD> __enable_irq();<3B><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
//
// //<2F>жϵ<D0B6><CFB5><EFBFBD><EFBFBD>˳<EFBFBD><CBB3>͹<EFBFBD><CDB9>ĵ<EFBFBD><C4B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ⲿ<EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ļ<EFBFBD><C4BB>ǵδ<C7B5><CEB4><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>ʱʱ<CAB1>䵽<EFBFBD><E4B5BD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
// if( ( ulSysTickCTRL & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 ) (14) <20>ж<EFBFBD><D0B6>˳<EFBFBD><CBB3>͹<EFBFBD><CDB9><EFBFBD>ģʽ<C4A3><CABD><EFBFBD>ɵδ<C9B5><CEB4><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ļ<EFBFBD><C4BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ԭ<EFBFBD><D4AD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ӧ<EFBFBD><D3A6>ϵͳʱ<CDB3><CAB1><EFBFBD>⳥ֵ<E2B3A5>ļ<EFBFBD><C4BC>㷽<EFBFBD><E3B7BD><EFBFBD><EFBFBD>ͬ<EFBFBD><CDAC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ϵͳʱ<CDB3>Ӳ<EFBFBD><D3B2><EFBFBD>ֵ<EFBFBD>ĵ<EFBFBD>λ<EFBFBD><CEBB>ʱ<EFBFBD>ӽ<EFBFBD><D3BD>ġ<EFBFBD>
// {
// uint32_t ulCalculatedLoadValue;
// ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue -
// portNVIC_SYSTICK_CURRENT_VALUE_REG );
//
// if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) ||
// ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
// {
// ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
// }
// portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
// ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
// }
// else //<2F>ⲿ<EFBFBD>жϻ<D0B6><CFBB>ѵģ<D1B5><C4A3><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>ʱ<EFBFBD>䲹<EFBFBD><E4B2B9>
// {
// ulCompletedSysTickDecrements = ( xExpectedIdleTime *
// ulTimerCountsForOneTick ) -
// portNVIC_SYSTICK_CURRENT_VALUE_REG;
//
// ulCompleteTickPeriods = ulCompletedSysTickDecrements
// ulTimerCountsForOneTick;
//
// portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) *
// ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
// }
//
// //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>δ<EFBFBD><CEB4><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>δ<EFBFBD><CEB4><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>װ<EFBFBD><D7B0>ֵ<EFBFBD><D6B5><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD>ֵ<EFBFBD><D6B5>
// portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
// portENTER_CRITICAL();
// {
// portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
// vTaskStepTick( ulCompleteTickPeriods ); (15) <20><><EFBFBD>ú<EFBFBD><C3BA><EFBFBD> vTaskStepTick() <20><><EFBFBD><EFBFBD>ϵͳʱ<CDB3>ӣ<EFBFBD><D3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ<EFBFBD><D6B5><EFBFBD>˺<EFBFBD><CBBA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD> tasks.c <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><C2B6><EFBFBD>
//void vTaskStepTick(const TickType_t xTicksToJump)
//{
// configASSERT((xTickCount+xTickToJump)<=xNextTaskUnblockTime);
// xTickCount+=xTicksToJump;
// traceINCREASE_TICK_COUNT(xTicksToJump);
//}
// portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
// }
// portEXIT_CRITICAL();
// }
//}
//*/